What Is a Flyover Cable? Why Do AI Servers Use High-Speed Cables to Bypass PCB Traces?｜Technology Year：2022

As PCIe, SerDes, GPU, and network I/O data rates continue to increase in AI servers, long high-speed PCB routes become more difficult to manage.

Key challenges include:

**Insertion Loss

• Via Loss
• Crosstalk
• Impedance Discontinuity
• PCB Routing Density**

The core idea behind a Flyover Cable architecture is:

Move high-speed signals off the PCB earlier, route them through a low-loss high-speed cable over a longer physical distance, and reconnect them closer to the ASIC, connector, backplane, or I/O port.

This approach does not eliminate the PCB. Instead, it reduces the amount of long, lossy PCB routing used by the most demanding high-speed channels.

It is also important to distinguish the terminology:

Flyover is not a protocol such as PCIe, Ethernet, InfiniBand, or NVLink, and it is not a universal connector standard.

It is better understood as a:

High-Speed Physical Interconnect Architecture

Samtec's Flyover® is a branded implementation of this concept, while other suppliers offer similar over-the-board or internal cabled interconnect architectures.

Flyover Cable vs Traditional PCB Routing

A conventional high-speed path may look like:

ASIC / GPU / NIC
→ PCB Trace
→ Via
→ More PCB Trace
→ I/O Connector

A Flyover architecture may instead use:

ASIC / GPU / NIC
→ Short PCB Trace
→ Board-to-Cable Connector
→ Low-Loss Twinax Cable
→ I/O / Backplane / Destination

The goal is not to remove every PCB trace.

It is to:

Shorten the most difficult long-distance PCB portion of the high-speed channel.

Why Do Higher Data Rates Make Long PCB Routes More Difficult?

PCB traces can absolutely carry high-speed signals.

The real issue is:

As the data rate increases, the same physical PCB distance consumes more of the available channel-loss budget.

High-speed PCB channels are affected by:

• Dielectric loss
• Conductor loss
• Copper roughness
• Vias
• Connector launches
• Trace length
• Crosstalk

As interfaces move to higher signaling rates, these factors leave less electrical margin for long motherboard routes.

PCIe is a clear example.

PCIe 6.0 increased the signaling rate to 64 GT/s and introduced PAM4. PCIe 7.0 later doubled the rate again to 128 GT/s, placing even greater emphasis on channel performance and reach.

Therefore, the engineering question is not:

“Can PCB still be used?”

It is:

Which portions of the channel are best kept on the PCB, and which portions are more efficiently routed through a lower-loss cable?

Why Is Twinax Commonly Used for Flyover Architectures?

High-speed copper Flyover systems often use:

Twinax Differential Cable

because Twinax can maintain tightly controlled:

**Conductor Geometry

• Dielectric
• Shielding
• Pair Spacing**

for differential high-speed signaling.

This makes it possible to create a controlled-impedance, low-skew transmission path that can outperform long PCB routing for certain channel distances and data rates.

The main benefits are not simply that the cable is physically larger.

The important properties are:

**Low Loss

• Controlled Impedance
• Low Skew
• Shielding
• Optimized High-Speed Connector Transitions**

At higher SerDes generations, near-chip and cabled interconnect technologies continue evolving toward 112G- and 224G-class signaling.

Where Is a Flyover Cable Typically Used?

A Flyover Cable does not have one fixed source and destination.

The more useful question is:

Which part of the high-speed PCB path is too long, too lossy, or too difficult to route?

Typical examples include:

This means Flyover should not be simplified as:

“A GPU connected directly to a cable.”

The source may instead be a:

GPU
NIC
Switch ASIC
PCIe Switch
Retimer

or another high-speed component, depending on the system topology.

Can Flyover Cable Replace a Retimer?

Not necessarily.

Flyover and Retimer technologies solve different problems.

The Flyover design philosophy is:

Reduce how much signal degradation occurs in the first place.

A Retimer instead addresses the problem after the signal has already crossed part of the electrical channel:

Recover and regenerate the signal before sending it onward.

A sufficiently low-loss Flyover path may reduce the need for a Retimer in some specific applications, but this depends on:

**Data Rate

• Reach
• Complete Channel Loss
• Connector Transitions
• Host / Receiver Capability**

It should never be assumed that every Flyover architecture eliminates Retimers.

Is Flyover the Same as AEC?

No.

They describe different aspects of a system.

Flyover describes:

Physical Routing Architecture

AEC, or Active Electrical Cable, describes:

Whether active electronics are integrated inside the cable assembly.

A system can therefore use:

Passive Flyover Cable

or, depending on architecture:

Active / Retimed Cabled Interconnects

The same distinction applies to DAC.

Flyover is not the same as DAC.

DAC usually describes a Direct Attach Copper connection between equipment ports.

Flyover more commonly refers to routing internal high-speed signals around part of the PCB.

Advantages and Trade-Offs of Flyover Cable

Flyover architecture is not automatically the best solution for every AI server.

Therefore:

Flyover is not a universal replacement for PCB routing. It is an architecture option when the high-speed channel budget becomes difficult to close.

If an ASIC and connector are physically close and the PCB channel already meets the Signal Integrity requirements, direct PCB routing may remain the simplest solution.

Flyover becomes more valuable when:

**Trace Length

• Data Rate
• Lane Density
• Via Count
• PCB Material
• Mechanical Layout**

make conventional routing increasingly difficult.

Why Is Flyover Especially Relevant to AI Servers?

AI servers are simultaneously increasing:

**GPU Count

• PCIe Speed
• NIC Bandwidth
• Switch I/O
• Lane Count
• Power Density**

Meanwhile, the PCB must also carry:

Power Delivery
Memory
Control Signals
Cooling Structures
Mechanical Features

If every high-speed lane must cross long distances on the motherboard, PCB layer count, signal loss, via complexity, and layout difficulty can increase significantly.

This is why architectures such as:

Near-Chip Cable
Flyover Cable
Cable Backplane
Co-Packaged Copper

are becoming more relevant in high-speed AI hardware.

However:

Not every new AI platform will use a cable-first architecture.

System designers still evaluate:

**Reliability

• Serviceability
• Cost
• Thermal Design
• PCB Technology
• Mechanical Layout**

before choosing PCB, cable, or a hybrid approach.

What Should Be Evaluated When Selecting a Flyover Cable?

It is not enough to ask:

“How many gigabits does this cable support?”

At minimum, the following should be evaluated:

The correct evaluation unit is the complete channel:

Transmitter
→ PCB / Package
→ Connector
→ Cable
→ Connector
→ PCB
→ Receiver

rather than evaluating the cable alone.

Flyover Cable: Key Takeaways

The five most important points are:

First, the main purpose of Flyover architecture is to move part of a high-speed signal path from long PCB routing into a lower-loss cable.

Second, Flyover is not a protocol or universal connector standard. It is a high-speed physical interconnect architecture.

Third, its main benefits are lower channel loss, reduced high-speed PCB routing pressure, and greater system-layout flexibility.

Fourth, Flyover is not the same as a Retimer, AEC, or DAC. These technologies address different parts of the high-speed interconnect problem.

Fifth, Flyover is not mandatory for every AI server. Its value depends on data rate, reach, SI budget, mechanical layout, thermal requirements, and cost.

The real engineering question is therefore not:

“Which is better, PCB or cable?”

It is:

Which part of the complete high-speed channel should remain on the PCB, and which part should transition to cable?

That is why Flyover Cable architectures become increasingly important as AI servers move toward higher PCIe, SerDes, GPU, and network I/O data rates.

SyncTronics Solutions

Flyover and internal high-speed cable designs for AI servers should be evaluated according to protocol, lane rate, lane count, cable length, connector location, characteristic impedance, insertion loss, return loss, crosstalk, skew, retimer requirements, and the complete Signal Integrity budget. SyncTronics can support specification verification and NPI evaluation for high-speed Cable Assemblies, Twinax, connectors, and customized electronic interconnect solutions for AI servers, GPUs, networking systems, PCIe applications, and data center projects.

Related Articles

• How Are High-Speed Cables Routed Inside AI Servers? GPU, NIC, Switch, and Cable Architecture Explained
• What Is Signal Integrity? A Complete Guide to Insertion Loss, Return Loss, Crosstalk, and Impedance in High-Speed Cables
• Retimer vs Redriver vs AEC: A Complete Guide to High-Speed Signal Extension Technologies
• High-Speed DAC Cable Structure Explained: Twinax, AWG, Shielding, and Signal Integrity

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