PCIe Gen4 vs Gen5 vs Gen6: Bandwidth, Lanes, and High-Speed Interconnect Comparison｜Technology Year：2022

PCI Express, or PCIe, is one of the most important high-speed interconnect technologies used between servers, GPUs, AI accelerators, NICs, NVMe SSDs, and other high-performance devices.

From PCIe Gen4 → Gen5 → Gen6, PCI-SIG doubled the raw transfer rate per lane:

16 GT/s → 32 GT/s → 64 GT/s

However, PCIe Gen6 is more than simply another doubling of speed. Gen4 and Gen5 continue to use NRZ signaling, while Gen6 introduces PAM4, FLIT Mode, FEC, and CRC, marking a major change in PCIe electrical signaling architecture.

PCIe Gen4 vs Gen5 vs Gen6: Quick Comparison

The key trend is straightforward:

Each generation doubles the raw data rate per lane, while Gen6 also changes the signaling architecture.

What Does a PCIe Lane Mean?

PCIe does not use one fixed link width.

Common PCIe configurations include:

x1, x2, x4, x8, and x16

The “x” value represents the number of lanes in the link.

A simplified bandwidth relationship is:

Total Bandwidth ≈ Bandwidth per Lane × Lane Count

For example, within the same PCIe generation:

• x4 is commonly used for high-speed storage
• x8 may be used for accelerators and NICs
• x16 is commonly used for GPUs and other high-bandwidth devices

However:

x16 alone does not define performance.

A PCIe Gen4 x16 link and a PCIe Gen5 x16 link have the same lane count, but Gen5 provides twice the raw data rate per lane.

What Are the Main Differences Between Gen4, Gen5, and Gen6?

The differences can be understood in three major layers.

1. Per-Lane Data Rate Doubles Every Generation

Gen4: 16 GT/s
Gen5: 32 GT/s
Gen6: 64 GT/s

With the same lane count, each new generation provides substantially higher bandwidth.

2. Gen6 Moves from NRZ to PAM4

PCIe Gen4 and Gen5 use:

NRZ

while PCIe Gen6 adopts:

PAM4

NRZ primarily carries one bit per symbol. PAM4 uses four amplitude levels and can carry two bits per symbol.

This allows Gen6 to double the transfer rate from 32 GT/s to 64 GT/s without directly doubling the Nyquist frequency.

The trade-off is greater sensitivity to:

• Noise
• Reflection
• Crosstalk
• Jitter
• Channel loss
• Equalization limitations

As a result, Signal Integrity becomes even more critical in Gen6-class links.

3. Gen6 Introduces FLIT, FEC, and CRC

To support PAM4 signaling and maintain reliability, PCIe Gen6 introduces:

**FLIT Mode

• FEC
• CRC**

The PCIe Gen6 architecture uses fixed-size FLIT-based transmission together with Forward Error Correction and CRC mechanisms to manage the higher raw error characteristics associated with PAM4 while maintaining high bandwidth and low latency.

Why Do Faster PCIe Generations Make Cable and Connector Design More Difficult?

A PCIe upgrade is not only an IC-level problem.

A complete high-speed channel may include:

CPU / GPU / Switch
→ PCB
→ Connector
→ Cable
→ Connector
→ PCB
→ Endpoint

As data rates increase from 16 GT/s to 32 GT/s and 64 GT/s, the channel becomes more sensitive to electrical losses and discontinuities.

This is why higher PCIe generations demand better control of the complete electrical path rather than only faster devices.

Are PCIe Gen4, Gen5, and Gen6 Backward Compatible?

Backward compatibility is one of PCIe's major architectural strengths.

PCIe Gen6 continues to support lower PCIe data rates, while Gen6 high-speed operation uses PAM4 and previous generations use NRZ.

However, backward compatibility does not mean that any device will automatically operate at the fastest generation available.

Actual link speed depends on:

• Host-supported PCIe generation
• Endpoint-supported generation
• Lane width
• Connector and cable electrical performance
• PCB channel quality
• BIOS / firmware
• Link training

For example, a Gen5 endpoint connected to a Gen4-only host will normally operate at the highest mode supported by both sides rather than at full Gen5 speed.

Typical PCIe Gen4, Gen5, and Gen6 Applications

For external PCIe and cable-based implementations, the electrical channel becomes especially important because cable length and additional connectors contribute to the total loss budget.

Why Is Gen4 → Gen5 → Gen6 an Important Transition for High-Speed Interconnects?

These three generations clearly show how PCIe evolved from simply increasing NRZ signaling rate toward a more complex high-speed signaling architecture:

PCIe Gen4
16 GT/s NRZ

PCIe Gen5
32 GT/s NRZ

PCIe Gen6
64 GT/s PAM4

Gen6 therefore represents a key transition point where higher data rates could no longer be addressed only by pushing NRZ signaling faster.

Instead, PCIe adopted:

**PAM4

• FLIT
• FEC
• CRC**

to continue increasing bandwidth while controlling channel-frequency requirements and maintaining reliability.

Is PCIe Gen6 the Latest PCIe Generation?

No.

PCI-SIG officially released the PCIe 7.0 Specification in June 2025, increasing the raw data rate again to:

128 GT/s

Therefore, Gen4, Gen5, and Gen6 should be understood as an important sequence in modern PCIe development rather than the final generations of the technology.

From the perspective of Cable, Connector, and Signal Integrity design, however, Gen4 → Gen5 → Gen6 remains especially useful because it clearly illustrates the transition from:

Higher-Speed NRZ

to:

PAM4-Based High-Speed Signaling

PCIe Gen4 vs Gen5 vs Gen6: Key Takeaways

The main differences can be summarized in four points:

PCIe Gen4: 16 GT/s per lane using NRZ.

PCIe Gen5: 32 GT/s per lane using NRZ, doubling Gen4 bandwidth.

PCIe Gen6: 64 GT/s per lane using PAM4 and introducing FLIT, FEC, and CRC.

x1, x4, x8, and x16 describe lane count, not PCIe generation. Actual bandwidth depends on both generation and lane width.

Therefore, a complete PCIe interconnect evaluation should consider:

**PCIe Generation

• Lane Count
• Data Rate
• Signaling
• Channel Loss
• Connector
• Cable
• Signal Integrity**

together.

SyncTronics Solutions

As PCIe evolves from Gen4 and Gen5 to Gen6, cables and connectors must support higher data rates and increasingly demanding Signal Integrity requirements. SyncTronics can support PCIe Cable Assembly and high-speed interconnect evaluation based on PCIe generation, lane count, equipment interface, cable length, connector type, impedance, and complete channel conditions. Our high-speed transmission portfolio also includes PCIe Gen4 external high-speed cable solutions for servers, storage systems, accelerators, expansion chassis, HPC, and related applications.

Need Wire Harnesses, Connectors, Electromechanical Components, or Custom Solutions? Contact Us Today

Whether you are looking for connectors, cables, wire harness assemblies, electromechanical components, or complete electronic interconnect solutions, SyncTronics provides professional technical support and engineering evaluation for product selection, specification verification, New Product Introduction (NPI), OEM/ODM customization, as well as high-speed transmission, high-reliability, and other specialized application requirements.

We welcome you to visit our Contact Us page and share your project requirements and contact information. Our team is committed to responding quickly and professionally, evaluating the most suitable products and electronic interconnect solutions based on your product specifications, application requirements, and project objectives. We also provide technical recommendations and customized engineering support to help shorten product selection and development time, reduce project risks, and accelerate your path to mass production. We look forward to the opportunity to work with you and provide reliable technical support and practical solutions for every stage of your project.

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